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Actel's Space FPGAs Break 1-Million Gate Barrier

New High-Density RTAX-S Family Stands Alone as Radiation-Tolerant Alternative to ASICs

SUNNYVALE, Calif., May 26 /PRNewswire-FirstCall/ -- Building on its continuing commitment to develop new high-reliability products for the aerospace community, Actel Corporation today unveiled its next-generation, radiation-tolerant RTAX-S field-programmable gate array (FPGA) offerings. With densities up to 2-million equivalent system gates (approximately 250,000 ASIC equivalent gates), the new space-optimized, high-density, single-chip devices offer key features, such as hardened registers that offer practical single-event upset (SEU) immunity and, for the first time, usable error-corrected onboard RAM. These features position the RTAX-S family as the only viable radiation-tolerant alternative to application-specific integrated circuits (ASICs) that meets the density, performance and radiation-resistance requirements of many satellite applications. Actel's RTAX-S devices will allow the company to aggressively target bus and payload applications in low-, mid- and geosynchronous-earth orbit satellites.

"In addition to breaking the 1-million gate barrier, Actel's new antifuse-based, radiation-tolerant RTAX-S FPGAs serve as another proof point in the company's long-standing commitment to delivering high-quality, radiation-tolerant solutions for space applications," said Barry Marsh, vice president of product marketing at Actel. "ASICs have traditionally been used to meet the high-density, high-performance requirements of payload applications in space. We believe our high-density RTAX-S family not only meets the stringent demands of these applications, but offers tremendous advantages over ASICs, including increased flexibility, shortened design time and low-cost benefits."

The RTAX-S devices offer inherent single-event latchup (SEL) immunity; >37MeV-cm2/mg SEU capability; and total ionizing dose (TID) performance in excess of 200 Krads. The family also features embedded RAM with an upset rate of <1E-10 errors/bit-day with error detection and correction (EDAC). With 2-million system gates, the largest device in the family, the RTAX2000S, contains support for up to 288k bits of embedded SRAM; 684 user I/Os; and 10,752 SEU-hardened registers.

Based on Actel's AX architecture and scalable platform, the RTAX-S devices include several key architectural advancements: an embedded FIFO controller; a fully fracturable SuperCluster that allows high logic module utilization; a core tile structure that provides tighter clock skew across the device; and a flexible clock structure with eight global clocks available equally across the chip, eliminating the need for clock floorplanning and easing design migration.

Intellectual Property

To complement the high densities and performance of the RTAX-S family, Actel offers a new MIL-STD-1553B bus controller intellectual property (IP) core, the company's second MIL-STD-1553B offering. The Core1553BBC is a complete dual-redundant bus controller that can interface to standard external transceivers. Actel's new bus controller solution provides low-power operation at 12, 16, 20 and 24 MHz. Delivering a complete solution, Actel provides everything needed to incorporate a 1553B bus controller into a system design, including an evaluation board, development tools, documentation and software.

RTAX-S Support

To enable board-level functional verification and simulation of production-qualified solutions, Actel is offering RTAX-S prototyping capability via hardware adaptors that leverage the company's commercial Axcelerator FPGAs, which are also based on the AX architecture. Additionally, Actel's RTAX-S prototyping solution includes software support for error detection and correction IP, which mitigates SEUs in the user memory. Application notes explaining how to design RTAX-S-based applications using Axcelerator devices are available from Actel at http://www.actel.com/.

The RTAX-S family is supported by the Actel Libero integrated design environment and Actel Designer tool suite, which includes place and route, timing analysis and memory generation functionality. Additional support for the family is provided by industry-leading third-party tools from Model Technology, Mentor Graphics, Synplicity, Cadence Design Systems and Synopsys.

Pricing and Availability

Prototyping capability for the first members of the RTAX-S family, the RTAX1000S and RTAX2000S, which offer 1-million and 2-million equivalent system gates, respectively, is currently available with production scheduled to begin in 2H 2004. For further information about pricing and availability, please contact Actel.

About Actel

Actel Corporation is a supplier of innovative programmable logic solutions, including field-programmable gate arrays (FPGAs) based on antifuse and flash technologies, high-performance intellectual property (IP) cores, software development tools and design services targeted for the high-speed communications, application-specific integrated circuit (ASIC) replacement and radiation-tolerant markets. Founded in 1985, Actel employs approximately 500 people worldwide. The Company is traded on the Nasdaq National Market under the symbol ACTL and is headquartered at 955 East Arques Avenue, Sunnyvale, Calif., 94086-4533. Telephone: 888-99-ACTEL (992-2835). Internet: http://www.actel.com/ .

NOTE: The Actel name and logo are trademarks or registered trademarks of Actel Corporation. All other trademarks and servicemarks are the property of their respective owners.

CONTACT: Clive Jones of Actel Corporation, +1-888-992-2835, or
clive.jones@actel.com; or media, Patty Ladegaard of Porter Novelli,
+1-408-369-1500, ext. 30, or pladegaard@porternovelli.com, for
Actel Corporation

Web site: http://www.actel.com/

http://www.mentor.com/dsm/
http://www.mentor.com/pcb/
http://www.mentor.com/dft/
http://www.mentor.com/fpga/
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